From tony.luck@intel.com Wed Mar 16 10:08:41 2005 Return-Path: X-Original-To: jbarnes@spamtin.engr.sgi.com Delivered-To: jbarnes@spamtin.engr.sgi.com Received: from cthulhu.engr.sgi.com (cthulhu.engr.sgi.com [192.26.80.2]) by spamtin.engr.sgi.com (Postfix) with ESMTP id 5FA3D1C08B9E for ; Wed, 16 Mar 2005 10:08:46 -0800 (PST) Received: from cuda.sgi.com (cuda3.sgi.com [192.48.176.15]) by cthulhu.engr.sgi.com (SGI-8.12.5/8.12.5) with ESMTP id j2GI8j7d3522145 for ; Wed, 16 Mar 2005 10:08:46 -0800 (PST) X-ASG-Debug-ID: 1110996524-28946-511-0 X-Barracuda-URL: http://192.48.176.15:80/cgi-bin/mark.cgi Received: from scsfmr003.sc.intel.com (fmr23.intel.com [143.183.121.15]) by cuda.sgi.com (Spam Firewall) with ESMTP id 01A8E33A1D for ; Wed, 16 Mar 2005 10:08:44 -0800 (PST) Received: from scsfmr100.sc.intel.com (scsfmr100.sc.intel.com [10.3.253.9]) by scsfmr003.sc.intel.com (8.12.10/8.12.10/d: major-outer.mc,v 1.1 2004/09/17 17:50:56 root Exp $) with ESMTP id j2GI8ikL017205; Wed, 16 Mar 2005 18:08:44 GMT Received: from unix-os.sc.intel.com (unix-os.sc.intel.com [172.25.110.7]) by scsfmr100.sc.intel.com (8.12.10/8.12.10/d: major-inner.mc,v 1.2 2004/09/17 18:05:01 root Exp $) with ESMTP id j2GI9kFZ017586; Wed, 16 Mar 2005 18:09:46 GMT Received: from localhost (localhost [[UNIX: localhost]]) by unix-os.sc.intel.com (8.11.6/8.11.2) id j2GI8f210486; Wed, 16 Mar 2005 10:08:41 -0800 Date: Wed, 16 Mar 2005 10:08:41 -0800 Message-Id: <200503161808.j2GI8f210486@unix-os.sc.intel.com> From: "Luck, Tony" To: torvalds@osdl.org Cc: akpm@osdl.org Cc: hugh@veritas.com; Cc: benh@kernel.crashing.org Cc: paulus@samba.org Cc: kravetz@us.ibm.com; Cc: jbarnes@engr.sgi.com X-ASG-Orig-Subj: pgd_addr_end fix for ia64 Subject: pgd_addr_end fix for ia64 Reply-To: tony.luck@intel.com X-Scanned-By: MIMEDefang 2.44 X-Virus-Scanned: by cuda.sgi.com at sgi.com X-Barracuda-Spam-Score: 0.00 X-Barracuda-Spam-Status: No, SCORE=0.00 using per-user scores of TAG_LEVEL=3.5 QUARANTINE_LEVEL=1000.0 KILL_LEVEL=1000.0 tests= X-Barracuda-Spam-Report: Code version 2.64, rules version 2.1.1898 Rule breakdown below pts rule name description ---- ---------------------- ------------------------------------------- X-Spam-Checker-Version: SpamAssassin 3.0.2 (2004-11-16) on spamtin.engr.sgi.com X-Spam-Level: X-Spam-Status: No, score=-1.8 required=5.0 tests=AWL,BAYES_00, DNS_FROM_RFC_POST autolearn=no version=3.0.2 Content-Type: X-UID: 16541 X-Length: 5637 Here's a patch with my math errors fixed (see the '7' where once there was a '6' ... I need to look for when top bit of the pgdlow area is set and do the sign extension ... not wait until pgdlow overflows into the rsvd area). There are some much better comments to explain what is going on. I don't have an ia64 override for pmd_addr_end() because I can't see why I'd need one. No pmd will ever span a hole on ia64 (though they can end on the edge of a hole). But this means that we'll just get to the end of the pmd and stop, so it shouldn't matter whether the 'next' address that we computed is across the hole, we'll be limited by the 'end' address, won't we? -Tony #### AUTHOR tony.luck@intel.com #### COMMENT START ### Comments for ChangeSet [IA64] override for pgd_addr_end to step around holes Every user region has a hole in the middle where we don't have enough bits in pgd+pmd+pte so pgd_addr_end needs some extra math to compute the virtual address base of the next pgd entry. Thanks to Dave Miller for pointing me in the right direction. Signed-off-by: Tony Luck ### Comments for include/asm-ia64/pgtable.h ia64 override for pgd_addr_end to step around holes #### COMMENT END # This is a BitKeeper generated diff -Nru style patch. # # ChangeSet # 2005/03/16 09:37:39-08:00 tony.luck@intel.com # [IA64] override for pgd_addr_end to step around holes # # Every user region has a hole in the middle where we don't have # enough bits in pgd+pmd+pte so pgd_addr_end needs some extra math # to compute the virtual address base of the next pgd entry. # # Thanks to Dave Miller for pointing me in the right direction. # # Signed-off-by: Tony Luck # # include/asm-ia64/pgtable.h # 2005/03/16 09:33:36-08:00 tony.luck@intel.com +17 -0 # ia64 override for pgd_addr_end to step around holes # Index: linux-2.6.11/include/asm-ia64/pgtable.h =================================================================== --- linux-2.6.11.orig/include/asm-ia64/pgtable.h 2005-03-17 16:38:54.000000000 -0800 +++ linux-2.6.11/include/asm-ia64/pgtable.h 2005-03-17 16:40:20.000000000 -0800 @@ -550,6 +550,23 @@ do { \ #define __HAVE_ARCH_PTEP_SET_WRPROTECT #define __HAVE_ARCH_PTE_SAME #define __HAVE_ARCH_PGD_OFFSET_GATE + +/* + * Override for pgd_addr_end() to deal with the virtual address space holes + * in each region. Virtual address bits are used like this: + * +--------+------+--------+-----+-----+--------+ + * | pgdhi3 | rsvd | pgdlow | pmd | pte | offset | + * +--------+------+--------+-----+-----+--------+ + * The high bit of 'pgdlow' must be sign extended across the 'rsvd' bits. + */ +#define IA64_PGD_SIGNEXTEND (PGDIR_SIZE << (PAGE_SHIFT-7)) +#define pgd_addr_end(addr, end) \ +({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \ + if (__boundary & IA64_PGD_SIGNEXTEND) \ + __boundary |= (RGN_SIZE - 1) & ~(IA64_PGD_SIGNEXTEND-1);\ + (__boundary - 1 < (end) - 1)? __boundary: (end); \ +}) + #include #include